1. Field
Example embodiments relate to a non-volatile memory device including a charge trapping layer and a method of manufacturing the non-volatile memory device.
2. Description of Related Art
In general, semiconductor memory devices are classified as either volatile or non-volatile semiconductor memory devices. Volatile semiconductor memory devices (e.g., dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices) have a relatively high response speed. However, the volatile semiconductor memory devices lose stored data when power is discontinued. On the other hand, although non-volatile semiconductor memory devices (e.g., electrically erasable programmable read only memory (EEPROM) devices and flash memory devices) have a relatively slow response speed, non-volatile semiconductor memory devices are able to maintain stored data even when power is discontinued.
In EEPROM devices, data is electrically stored (e.g., programmed or erased) through a Fowler-Nordheim (F-N) tunneling mechanism and/or a channel hot electron injection mechanism. The flash memory device is classified as either a floating gate type or a charge trap type (e.g., silicon-oxide-nitride-oxide semiconductor (SONOS) type devices and metal-oxide-nitride-oxide semiconductor (MONOS) type devices).
The SONOS or MONOS type non-volatile memory device includes a tunnel insulating layer formed on a channel region of a semiconductor substrate, a charge trapping layer for trapping electrons from the channel region, a dielectric layer formed on the charge trapping layer, a gate electrode formed on the dielectric layer, spacers formed on sidewalls of the gate electrode and source/drain regions formed at surface portions of the semiconductor substrate adjacent to the channel region.
When thermal stress is applied to the charge trap type non-volatile memory device, electrons trapped in the charge trapping layer may be laterally diffused, thereby deteriorating high temperature stress (HTS) characteristics of the non-volatile memory device. For example, when the non-volatile memory device is maintained at a temperature of about 200° C. for about 2 hours, the threshold voltage of the non-volatile memory device may be reduced. For example, when programming and erasing operations of the non-volatile memory device are repeatedly performed about 1000 to 1200 times and the non-volatile memory device is maintained at a temperature of about 200° C. for about 2 hours, the threshold voltage of the non-volatile memory device may be increasingly reduced.